A FAST ACSU ARCHITECTURE FOR VITERBI DECODER USING T-ALGORITHM PDF

In this paper, we propose an efficient architecture based on pre-computation for Viterbi decoders incorporating T-algorithm. Through optimization at both. A Fast ACSU Architecture for Viterbi Decoder Using T-Algorithm. Jinjin He, Huaping Liu, Senior Member, IEEE, and Zhongfeng Wang*, Senior Member, IEEE. High performance ACS for Viterbi decoder using pipeline T-Algorithm .. Z. Wang, A fast ACSU architecture for Viterbi decoder using T-Algorithm, in: Proc.

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Skip to search form Skip to main content. Modern digital communication systems usually employ convolutional codes with large constraint length for good decoding performance, which leads to large complexity and power consumption in Viterbi decoders.

It is essential to use T-algorithm in Viterbi decoders to prune significant portions of the trellis states to dramatically reduce power consumption. This paper has 27 citations.

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Topics Discussed in This Paper. Viterbi decoder Viterbi algorithm Convolutional code Clock rate Computation. Critical path method Overhead computing Prunes.

Citations Publications citing this paper. Showing of 20 extracted citations.

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Viterbi Convolutional Encoding and Viterbi Decoding. Ganesh KumarA.

Implementation of Viterbi coder for text to speech synthesis Fiterbi. Abdul SubhanDikpal Reddy Design of high speed low power viterbi decoder for TCM system J.

Seshasayanan International Conference on Information…. References Publications referenced by this paper. Showing of 6 references. IC design of an adaptive Viterbi decoder.

Breadth-first trellis decoding with adaptive effort Stanley J. By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy PolicyTerms of Serviceand Dataset License.

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